Fujitsu Laboratories Develops Power-Saving CMOS Technology for 32nm-Generation and Beyond

  Kawasaki, Dec 16, 2008 - (JCN Newswire) - Fujitsu Laboratories Limited announced today the development of power-saving CMOS technology(1) for logic LSI chips for 32 nanometer- (32nm-) generation and beyond. The new technology enables employment of a specific silicon crystal surface(2), which previously had not been applied in silicon substrates due to the crystal surface's conventionally low performance in the past, by improving its performance.  

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